Scientific and Technical Journal


ISSN Print 2221-3937
ISSN Online 2221-3805

The problem of provision of the program code integrity of the computer system FPGA-based components is analyzed. It is noted in the article that the perspective direction of integrity monitoring of such kind of components is the embedding of monitoring hash immediately in a program code in the form of digital watermark. It is also noted that one of the important stages of preparation for embedding the digital watermark in FPGA program code is the LUT unit selection from the information FPGA-based device model. The mentioned units are the place of immediate location of the digital watermark. The unit should be selected with considering the natural restrictions and secret key ones used for embedding the digital watermark. A formalized procedure of the target LUT unit search in the information model of FPGA-device circuit was proposed. This unit program code is the place of immediate imbedding the digital watermark. The approaches to software implementation of the offered procedure are considered. The analysis of CAD AlteraQuartus structure, in the environment of which the target procedure is to be implemented, was made. As a result of analysis the possibility of interaction of software realizing the proposed procedure with CAD AlteraQuartus through the corresponding software interface APIQuartus was found out. The possibility to obtain the information necessary for the creation of LUT-circuit information model through APIQuartus was researched. The approaches to the automated analysis of program code and structure of FPGA-projects with the view of their integrity monitoring were further developed. The procedure offered in the work and the software, which implements it, can be applied in organizing the data preparation subsystem within the framework of the system of FPGA chip program code integrity monitoring.

DOI 10.15276/eltecs.28.104.2018.26
  1. Vanderbauwhede, W. and Benkrid, K. (2016). High-performance computing using FPGAs. Springer, New-York.
  2. Drozd, A., Drozd, J., Antoshchuk, S., Antonyuk, V., Zashcholkin, K., Drozd, M. and Titomir, O. (2017). Green Experiments with FPGA, In: V. Kharchenko, Y. Kondratenko and J. Kacprzyk, ed. Green IT Engineering: Components, Networks and Systems Implementation, vol. 105. Berlin, Springer International Publishing, pp. 219-239. DOI: 10.1007/978-3-319-55595-9_11
  3. Clock Networks and PLLs in Cyclone IV Devices [online] Available at: content/dam/altera-www/global/en_US/pdfs/literature/hb/ cyclone-iv/cyiv-51005.pdf[Accessed 02.04.2018].
  4. Logic Elements and Logic Array Blocks in Cyclone IV Devices [online] Available at: global/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51002.pdf[Accessed 02.04.2018].
  5. Drozd, M. and Drozd, A. (2014). Safety-Related Instrumentation and Control Systems and a Problem of the Hidden Faults. In: 10th International Conference on Digital Technologies, Zhilina, Slovak Republic, pp. 137-140. DOI: 10.1109/DT.2014.6868692
  6. Vacca, J. (2013). Computer and information security, 2nd edition. USA, Waltham: Morgan Kaufmann Publishers.
  7. Ferguson, N., Schneier, B. and Kohno, T. (2013). Cryptography engineering. Hoboken: Wiley.
  8. Vasu, S., George, S. and Deepthi, P. (2012). An Integrity Verification System for Images Using Hashing and Watermarking. In: Proceedings of the International Conference on Communication Systems and Network Technologies, pp. 85-89.
  9. Andress, J. and Leary, M. (2016). Building a Practical Information Security Program. Cambridge: Syngress.
  10. Andina, J. (2017). FPGAs: Fundamentals, Advanced Features, and Applications in Industrial Electronics. CRC Press.
  11. Shih, F. (2013). Multimedia Security: Watermarking, Steganography, and Forensics. Boston: CRC Press.
  12. Zashcholkin, K. and Ivanova, O. (2015). The Control Technology of Integrity and Legitimacy of LUT-Oriented Information Object Usage by Self-Recovering Digital Watermark. CEUR Workshop Proceedings, vol. 1356, pp. 486-497.
  13. Zashcholkin, K. and Ivanova, O. (2014). Information technology of embedding self-recovery
    digital watermark in LUT-oriented containers [Informacionnaja tehnologija vnedrenija samovosstanavlivajushhih cifrovyh vodjanyh znakov v LUT-orientirovannye kontejnery] Electrotrotechnic and computer systems,No16 (92), pp. 78-84. DOI: 10.15276/etks.16.92.2014.11
  14. Drozd, A., Drozd, M. and Kuznietsov, M. (2016). Use of natural LUT redundancy to improve trustworthiness of FPGA design. CEUR Workshop Proceedings, vol. 1614, pp. 322-331.
  15. Drozd, O., Drozd, M., Martynyuk, O. and Kuznietsov, M. (2017). Improving of a circuit checkability and trustworthiness of data processing results in LUT-based FPGA components of safety-related systems, CEUR Workshop Proceedings, vol. 1844, pp. 654-661.
  16. Zashcholkin, K. (2018). The technique and software implementation of creation of the LUT-circuit information model placed in FPGA environment [Metodika i programmnaja realizacija postroenija informacionnoj modeli LUT-shemy, razmeshhennoj v srede FPGA], Transactions of Kremenchuk Mykhailo Ostrohradskyi National University,No 1 (108),pp. 46-51.
Last download:
29 Feb 2020

[ © KarelWintersky ] [ All articles ] [ All authors ]
[ © Odessa National Polytechnic University, 2014-2018. Any use of information from the site is possible only under the condition that the source link! ]