Green hardware decisionsoccupy a special place in development of computer systems and their components, implementing a general orientation towards energy saving as well as a necessary condition of low power consumption in improvement of autonomous and, in particular, mobile systems. Modern design of digital units is executed with use of programmable logic devices in form of FPGA-projects supported by green-oriented CAD. 

The static and dynamic constituents of power consumption are calculated for internal elements and outputs of the circuit. Power consumption is represented by current, expressed in milliamps subject to constant voltage. These indicators are integral for entire FPGA-project, leaving unanswered the question of distribution of power consumption inside the scheme solution that can be used for correction of the most power intensive parts of the circuit. First of all, this drawback relates to estimations of the most significant dynamic constituents of power consumption of FPGA-project, which depend on scheme signal activity.

Green-orientation of modern CAD systems based on Altera Quartus II and build-in utility PowerPlay Power Analyzer, allowing to optimize and to estimate FPGA-project by power consumption within the scope of signal activity management is regarded in this paper. Set of experiments show the importance of optimizing FPGA-project with its actual signals activity. Method for estimation of FPGA-project’s dynamic power consumption component distribution between parts of its scheme is offered. Method determines contribution of separate parts of the scheme to project’s power consumption by lowering signals activity, common for other parts of the scheme, for example, clock signals.